EDN

Overcoming DDR-2-interface challenges

DDR (double-data-rate) memory devices do an admirable job of unclogging the memory bottleneck between external memory and ASICs, but the nature of DDR is stretching the skills of designers creating ...
EDN

How To Interface DDR-II SRAMs with Stratix II Devices

Synchronous static RAM (SRAM) architectures are evolving to support the high-throughput requirements of communications, networking, and digital signal processing (DSP) systems. Previous Sync SRAM ...
Design-Reuse

Synopsys' DesignWare DDR PHY Compiler Eases Integration of Memory Interface IP

MOUNTAIN VIEW, Calif., Jan. 26, 2011-- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate ...
マイナビニュース

DDRとMCDRAMの2種類のメモリを使い分けできるKNL

KNLでは、高バンド幅のMCDRAMと呼ぶ3D積層のメモリを8個搭載する。AMDやNVIDIAが使うHBMはDRAMチップだけを4枚積層したメモリである。これに対して、KNLで使用するMCDRAMは4枚のDRAMチップの下にロジックチップを積層した構造になっている。これは富士通のFX100 ...