EDN

A self-calibrating low-power 16-bit 460 kS/s SAR ADC for microcontroller applications

Low cost microcontrollers are increasingly expected to provide high performance analog functions for applications that previously used stand-alone ADCs. These applications include power metering, ...
IEEE

A 16-b 8-MS/s Pipelined SAR ADC With Robust Ring Amplifier and On-Chip Bit-Weight Calibration

Abstract: This paper presents a pipelined successive approximation register (SAR) analog-to-digital converter (ADC). A robust ring amplifier with high power efficiency is implemented in the ADC. The ...
Nature

Noise-Shaping Successive Approximation Register Analog-to-Digital Converters

The noise‐shaping successive approximation register (NS‐SAR) analogue‐to‐digital converter represents an attractive hybrid architecture that merges the inherent energy efficiency and simplicity of ...
EDN

16-bit successive-approximation ADC includes LVDS interface

Dallas&#8212Texas Instruments says its ADS84xx is the industry's first 16-bit, successive approximation (SAR) analog-to-digital converter (ADC) family to include a serial low-voltage differential ...
Nature

Successive Approximation Register Analog-to-Digital Converters

Successive approximation register (SAR) analog-to-digital converters form a critical link between the analogue and digital realms in modern electronics. Operating through a binary search algorithm, ...
IEEE

A 6.38 fJ/conversion 0.6V 0.43μW 100 kS/s 10-bit successive approximation ADC

Abstract: This work presents a 10-bit successive approximation ADC for low voltage and low power applications. The chip operating voltage is 0.6 V with single-ended rail-to-rail swing input signal.
Electronics Weekly

ISSCC: Background calibration boost for ADC

At the International Solid-State Circuits Conference in San Francisco, Analog Devices revealed a 20-bit 1Msample/s successive approximation ADC with 0.3ppm INL (integral non‑linearity). Key to this ...